芯原微電子（上海）有限公司
宣講會時間：11月20日13：30
宣講會地點：榴園新華廳
Company profile
Founded in 2001, VeriSilicon Holdings Co., Ltd. ("VeriSilicon") is a fast growing silicon solutions company providing products and services that enable customers to meet their chip design objectives, accelerate development programs and deliver market proven silicon products - on time and at lower cost.
VeriSilicon specializes in providing expert design services, market leading ZSP® licensable cores and platforms, industry standard semiconductor IP and scalable ASIC turnkey services across a broad range of application markets, including multimedia, voice and wireless communications. VeriSilicon has an extensive track record of accelerating customer ASIC designs from initial specification to silicon, achieving first silicon success - on time and on spec - and taking customer silicon through to volume production, utilizing its partner network of leading wafer foundries and packaging and test companies in Asia Pacific and China. VeriSilicon's global customer base of market leading multi-nationals to fabless start-up companies benefit from shorter development cycles, reduced cost of ownership and economies of scale provided by VeriSilicon's value-added IP platforms, flexible engagement model, superior supply chain management and strong service culture.
With more than 180 highly skilled engineers and design centers worldwide, VeriSilicon's customers are able to leverage a truly global design services company to support their silicon projects and meet design and cost objectives. VeriSilicon has design, operation and sales and support offices in Santa Clara, California, Dallas, Texas, Shanghai and Beijing, China, Taipei, Taiwan, Tokyo, Japan, Nice, France and Seoul, Korea.
In 2005, VeriSilicon was ranked No.3 in Deloitte Technology Fast 50 China and No.6 in Deloitte Technology Fast 500 Asia Pacific. VeriSilicon was named one of the Red Herring's 100 Private Companies of Asia and was also selected as one of EE Times 60 Emerging Startups.
芯原股份有限公司(VeriSilicon)成立于2001年，是一家發展迅速的矽産品解決方案公司，公司提供的産品和服務使客戶能夠達到他們芯片設計的目标，加速開發項目并以較低的成本及時提供市場公認的矽産品。
芯原專注于在多媒體、語音和無線通信等廣大的應用市場提供專家設計服務、市場領先的授權内核和平台、業内标準的半導體 IP 以及可升級的 ASIC 全包服務。芯原在以下方面擁有廣泛的經驗：通過利用其在亞太（包括中國）領先的晶圓代工廠和包裝測試公司的合作夥伴網絡加速客戶 ASIC 設計（從初步的規格到矽産品）、在矽産品方面按時按規格取一次成功（First Silicon Success）以及使客戶矽産品實現量産。芯原的客戶大多是基于全球市場主導地位的跨國公司。通過芯原為他們提供的增值的IP平台、靈活的溝通模式、有效的供應鍊管理以及強大的支持服務，使其能夠真正有效的縮短研發周期、降低開發成本、并最終實現規模型經濟。
芯原在全球擁有150多個高級工程師和設計中心，客戶能夠真正利用全球設計服務公司為他們的矽項目提供支持并實現設計和成本目标。芯原在加州聖塔克拉拉、德州達拉斯、中國北京、中國台灣台北、日本東京、法國尼斯和韓國首爾擁有設計、經營和銷售支持辦事處。
2005年，芯原排名德勤中國高科技、高成長50強 (Deloitte Technology Fast 50 China) 第三名以及德勤亞太區高科技高成長500強 (Deloitte Technology Fast 500 Asia Pacific) 第六名。芯原還榮獲 Red Herring 亞洲尚未上市企業100強企業 (Red Herring's 100 Private Companies of Asia) 之一，并入選 EE Times 全球60家最具潛力半導體初創公司 (EE Times 60 Emerging Startups)。
1. Analog Circuit Design Engineer
模拟電路設計工程師
Responsibilities:
l Devise and develop deep sub-micron CMOS analog circuit
設計開發CMOS 深亞微米模拟電路
l Guide and/or supervise layout
指導、監督版圖設計
l Assist in the design of test boards so as to debug and verify test chips
協助設計測試闆, 調試驗證測試芯片
Requirements:
l MS/PHD degree, majored in EE
電子工程專業碩士/博士學曆
l Course knowledge and project experience in the related areas
相關課程知識及項目經驗
l Good understanding about one of the following disciplines: low voltage／low noise OPA, ADC & DAC, PLL/DLL, high speed IO, RF and other analog blocks
熟悉以下單項或多項設計概念：低電壓、低噪音OPA；ADC&DAC；PLL/DLL；高速IO；RF和其它模拟電路
l Self motivated, good communication and team work skills are a must
富有事業心和團隊合作精神，溝通表達能力良好
2. Physical Layout/QA Engineer
物理版圖設計/質量保證工程師
物理版圖設計/質量保證工程師
Job Descriptions:
l Design the layout of deep sub-micron CMOS circuits;
設計CMOS 深亞微米電路版圖
l Develop the layout of standard logic cells, memory and IO cells;
開發标準邏輯單元、存儲器及輸入輸出單元版圖
l Devise the layout of analog block, memory and High-speed IO cells;
設計模拟電路、存儲器和高速IO單元版圖
l Conduct layout physical verification.
實施版圖物理驗證
Requirements:
l BE majored in EE, CS, Physics, Automation or relevant discipline;
電子工程、計算機、物理、自動化或相關專業本科學曆
l Course knowledge in at least one of the following areas is required: Analog block, Memory and High-speed IO layout; training experience/certificate on layout is preferred;
具備模拟電路, 存儲器或高速IO版圖方面一門以上課程知識，有版圖培訓經曆或證書者優先
l Familiar with design rules in deep submicron processing;
熟悉深亞微米工藝設計規則
l Skills in DRC/LVS debugging;
有DRC/LVS 查錯技能
l Self motivated, good communication and team work skills are a must.
富有事業心和團隊合作精神，溝通表達能力良好
3. Design Implementation Engineer
設計實現工程師
設計實現工程師
Job responsibilities:
l Logic synthesis and timing analysis
邏輯綜合以及時序分析
l DFT (design-for-test) and ATPG
測試電路設計及自動測試向量生成
l Deep sub-micron chip floor plan
CMOS 深亞微米芯片平面布局
l CTS, Power plan, Placement & Routing, and SDF
CTS, 電源方案, 布局布線以及SDF
l Whole chip DRC/LVS
芯片級 DRC/LVS
Requirements:
l Master’s degree or above, majored in EE, CS, Physics or relevant discipline
電子工程，計算機科學或物理學等相關專業碩士或更高學曆
l Course knowledge about logic synthesis, DFT, STA, noise and crosstalk analysis, physical design, EDA tool and tape-out issue is a must, project experience in one of the above fields is required
具備邏輯綜合，測試電路設計，靜态時序分析，噪聲及串擾分析，物理版圖設計、EDA 工具以及流片課程知識，有部分相關項目經驗
l Self motivated, good communication and team work skills, steady and surefooted work attitude are highly wanted
富有事業心和團隊合作精神，溝通表達能力良好, 工作踏實穩定
4. SOC Design Engineer
芯片系統設計工程師
Responsibilities:
l Capable of independently contributing to and working on designs of ASIC components/modules in terms of RTL coding, logic synthesis, STA and DFT considerations
勝任RTL代碼，邏輯綜合，STA和DFT方面ASIC元器件和模塊的設計工作，能夠獨立完成任務
l Work closely with verification team, physical design, test and FPGA engineers to solve functional verification, floor-plan, timing and test issues
密切配合驗證工程師、版圖工程師、測試工程師以及FPGA工程師，解決功能性驗證、平面版圖、時序及測試等方面的問題。
l Be responsible for micro-architecture and implementations of ASIC functions all the way to chip-level formal verification, timing analysis and bridge to physical design
負責從微結構、ASIC功能實現、芯片級正式驗證乃至時序分析之整個過程，搭建通向物理設計的橋梁。
Requirements:
l MS/PhD, with at least 1+ years of experience in ASIC design, including course projects
碩士/博士學曆，至少一年ASIC設計經驗，包括課程項目
l Possessing the independent mastery of EDA tools and capability of solving technical issues in one of the following areas is a must：
Synopsys and/or Cadence tools; design specification bring-up, RTL coding and style critique, chip-level synthesis, static timing analysis, formal verification and scan-chain insertion
Synopsys and/or Cadence tools; design specification bring-up, RTL coding and style critique, chip-level synthesis, static timing analysis, formal verification and scan-chain insertion
熟練應用EDA工具，能夠獨立解決至少一項下述領域中的技術問題：
Synopsys 或Cadence 工具；設計規格的制定；RTL代碼和格式的審查；芯片級集成；靜态時序分析；驗證和掃描鍊嵌入
l Solid knowledge and proven track record in design flow and methodologies for deep submicron ASIC development is a plus
在深亞ASIC開發設計流程和方法上有着豐富知識及成功經驗者優先
l Strong understanding of ASIC design issues and considerations relating to silicon success
熟谙ASIC設計中的問題及矽驗證事項
l Self motivated, good communication and team work skills are a must
富有事業心和團隊合作精神，溝通表達能力良好
5. System Application Engineer
系統應用工程師
Job Descriptions:
l Design and develop various applications for IC products, including arrangement and debug of hardware on board level, and development of firmware (like BSP, Driver, API, etc.)
IC産品的應用設計開發，包括闆級的硬件設計，調試，相關固件firmware（如RTOS的BSP，driver, API等等）的開發
l Conduct FPGA verification of SOC, IC and IP circuits
SOC,IC和IP的FPGA驗證工作
l Carry out in-house tests for IC products and SOC systems developed by the company
IC和SOC的實驗室測試工作
l Provide technical support for customers regarding product applications
為客戶提供本公司産品的應用技術支持
Requirements:
l Master’s degree, majored in CS, EE or Automation
計算機、電子工程或自動控制專業碩士
l Good programming skills in C and assembly languages
有良好的C語言和彙編語言的編程能力
l Understand ARM architecture and its peripheral systems, understanding of ZSP(a type of DSP) is a plus
熟悉ARM體系及其外部系統, 熟悉ZSP(一種DSP)尤佳
l Good knowledge about FPGA application, Verilog or VHDL hardware language. Internship or project experience in FPGA synthesis and reuse is preferred
熟悉FPGA的應用，了解VHDL或Verilog 硬件描述語言。有FPGA綜合和設計複用方面的實習或項目經驗者優先
l Good knowledge about Embedded Operating System, for example, development of embedded LINUX and its driver.
熟悉嵌入式操作系統，如嵌入式Linux及其驅動程序的開發
l Self motivated, good communication and team work skills are a must
富有事業心和團隊合作精神，溝通表達能力良好
